AON6266E general description product summary v ds i d (at v gs =10v) 24a r ds(on) (at v gs =10v) < 13.2m? r ds(on) (at v gs =4.5v) < 17.7m? typical esd protection hbm class 2 applications 100% uis tested 100% rg tested 60v n-channel alphasgt tm orderable part number package type form minimum order quantity 60v ? trench power alphasgt tm technology ? low r ds(on) ? logic level gate drive ? esd protected ? excellent gate charge x r ds(on) product (fom) ? rohs and halogen-free compliant AON6266E dfn 5x6 tape & reel 3000 ? high frequency switching and synchronous rectification g d s top view 12 3 4 87 6 5 pin1 pin1 dfn5x6 top view bottom view symbol v ds v gs i dm i as avalanche energy l=0.3mh c e as v ds spike i v spike t j , t stg symbol t 10s steady-state steady-state r q jc t a =25c t a =70c t c =25c t c =100c t c =25c avalanche current c continuous drain current thermal characteristics parameter max t a =70c 3.2 c units junction and storage temperature range -55 to 150 typ p dsm w t a =25c 5.0 power dissipation a maximum junction-to-ambient a c/w r q ja 20 45 25 w i d v a 14 a 95 i dsm 11.5 mj 29 14.5 24 va absolute maximum ratings t a =25c unless otherwise noted 20 v maximum units maximum junction-to-case c/w c/w maximum junction-to-ambient a d 4.0 55 4.8 power dissipation b 10.5 t c =100c 10s p d 60 72 26 gate-source voltage pulsed drain current c 21 parameter drain-source voltage continuous drain current g rev.1.0: february 2017 www.aosmd.com page 1 of 6
AON6266E symbol min typ max units bv dss 60 v v ds =60v, v gs =0v 1 t j =55c 5 i gss 10 a v gs(th) gate threshold voltage 1.2 1.7 2.2 v 10.7 13.2 t j =125c 17.4 21.3 14 17.7 m? g fs 40 s v sd 0.72 1 v i s 24 a c iss 755 pf c oss 220 pf c rss 20 pf r g 0.6 1.3 2.0 ? q g (10v) 13.5 20 nc q g (4.5v) 6.5 10 nc q gs 2.5 nc q gd 3.0 nc q oss output charge v gs =0v, v ds =30v 11 nc t d(on) 5 ns t r 3 ns t d(off) 19 ns m? v gs =10v, v ds =30v, i d =20a total gate charge electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions gate resistance f=1mhz i dss a zero gate voltage drain current drain-source breakdown voltage i d =250 m a, v gs =0v r ds(on) static drain-source on-resistance gate source charge gate drain charge total gate charge switching parameters turn-on delaytime v ds =0v, v gs =20v maximum body-diode continuous current g input capacitance gate-body leakage current turn-off delaytime v gs =10v, v ds =30v, r l =1.5 w , r gen =3 w diode forward voltage dynamic parameters v gs =4.5v, i d =18a turn-on rise time reverse transfer capacitance v gs =0v, v ds =30v, f=1mhz v ds =v gs, i d =250 m a output capacitance forward transconductance i s =1a, v gs =0v v ds =5v, i d =20a v gs =10v, i d =20a t d(off) 19 ns t f 3 ns t rr 17 ns q rr 54 nc applications or use as critical components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applicatio ns or uses of its products. aos reserves the right to improve product design,functions and reliability without no tice. body diode reverse recovery charge body diode reverse recovery time i f =20a, di/dt=500a/ m s turn-off delaytime turn-off fall time r gen =3 w i f =20a, di/dt=500a/ m s a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja t 10s and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. single pulse width limited by junction temperatu re t j(max) =150 c. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. i. the spike duty cycle 5% max, limited by junctio n temperature t j(max) =125 c . rev.1.0: february 2017 www.aosmd.com page 2 of 6
AON6266E typical electrical and thermal characteristics 0 20 40 60 80 1 2 3 4 5 6 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 4 6 8 10 12 14 16 18 20 0 5 10 15 20 25 30 r ds(on) (m w ) i d (a) figure 3: on - resistance vs. drain current and gate 0.8 1 1.2 1.4 1.6 1.8 2 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on - resistance vs. junction temperature v gs =4.5v i d =18a v gs =10v i d =20a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 20 40 60 80 0 1 2 3 4 5 i d (a) v ds (volts) figure 1: on-region characteristics (note e) v gs =2.5v 3v 10v 3.5v 4v 4.5v 5v 6v d figure 3: on - resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c figure 4: on - resistance vs. junction temperature (note e) 5 15 25 35 45 2 4 6 8 10 r ds(on) (m w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =20a 25 c 125 c rev.1.0: february 2017 www.aosmd.com page 3 of 6
AON6266E typical electrical and thermal characteristics 0 100 200 300 400 500 0.0001 0.001 0.01 0.1 1 10 100 power (w) pulse width (s) figure 10: single pulse power rating junction - to - 0 2 4 6 8 10 0 3 6 9 12 15 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 0 10 20 30 40 50 60 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =30v i d =20a t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) v > or equal to 4.5v 10 m s 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s 10ms figure 10: single pulse power rating junction - to - case (note f) 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 z q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p dm in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse v gs > or equal to 4.5v figure 9: maximum forward biased safe operating area (note f) r q jc =4.8 c/w rev.1.0: february 2017 www.aosmd.com page 4 of 6
AON6266E typical electrical and thermal characteristics 0 5 10 15 20 25 30 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 12: power de-rating (note f) 0 5 10 15 20 25 30 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 13: current de-rating (note f) 1 10 100 1000 10000 1e-05 0.001 0.1 10 1000 power (w) pulse width (s) t a =25 c 0 0.2 0.4 0.6 0.8 0 10 20 30 40 50 60 eoss(uj) v (volts) 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 z q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p dm in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse pulse width (s) figure 15: single pulse power rating junction- to-ambient (note h) r q ja =55 c/w v ds (volts) figure 14: coss stored energy rev.1.0: february 2017 www.aosmd.com page 5 of 6
AON6266E - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off l bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar figure a: gate charge test circuit & waveforms figure b: resistive switching test circuit & wavefor ms figure c: unclamped inductive switching (uis) test c ircuit & waveforms vdd vgs id vgs rg dut - + vdc vgs vds id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr figure d: diode recovery test circuit & waveforms rev.1.0: february 2017 www.aosmd.com page 6 of 6
|
